Navitas GaN Cuts AI Server Power Waste With 800V Design

Every megawatt of electricity that a data center wastes converting voltage between stages is a megawatt that does not train a model, serve an inference request, or offset a cooling bill. Navitas Semiconductor and Microchip Technology released a reference design on October 5, 2026 that eliminates an entire conversion stage from the AI server power chain, converting 800 volts directly to the 6 volts that GPU boards consume. At the scale of a hundred-thousand-GPU cluster, that efficiency gain is not rounding error; it is the difference between a data center that fits within its utility interconnection limit and one that has to wait 18 months for a grid upgrade before it can power on.

What Actually Happened

On October 5, 2026, GlobeNewswire published the joint announcement from Navitas Semiconductor Corp and Microchip Technology: a complete 800V DC-to-6V DC reference design aimed at next-generation AI data centers. The platform achieves 96% peak efficiency, a figure that matters because the alternative industry standard, a two-stage conversion from 800V to 48V to 6V, typically achieves only 90 to 92% end-to-end efficiency. The gap between 90% and 96% sounds small until you run the arithmetic at scale: a data center consuming 100 megawatts of IT load at 90% conversion efficiency wastes approximately 11 megawatts in conversion losses alone. At 96% efficiency, those losses drop to roughly 4 megawatts. At current commercial power rates in Northern Virginia, the largest data center market in North America, that 7-megawatt improvement is worth approximately $5 million per year per facility and reduces the cooling infrastructure requirement proportionally, since every watt not wasted in conversion is also a watt not added to the heat load that chillers must remove.

The power density figure is equally striking. The reference design achieves 2,100 watts per cubic inch, a density that was essentially impossible at this voltage conversion ratio before gallium nitride (GaN) power devices became commercially viable at this scale. The core technology stack combines Navitas GaNFast FETs, the gallium nitride power transistors that form Navitas's core product line, with Microchip's dsPIC33AK Digital Signal Controllers for deterministic digital power control and the TA100 CryptoAuthentication security integrated circuit for hardware root-of-trust authentication and secure boot. Semiconductor Today confirmed the 800V-to-6V conversion happens in a single stage rather than the conventional two-stage topology, with GaN transistors switching at frequencies high enough to maintain stable output under the rapid power-draw fluctuations characteristic of GPU workloads during batch inference. The single-stage topology eliminates the intermediate 48V bus entirely, removing a conversion stage, its associated passive components, and the physical board space those components require.

The timing of the announcement aligns with a broader industry transition. Major hyperscalers including Meta, Google, and Microsoft have been migrating their next-generation data center racks from 48V DC bus distribution to 800V DC bus distribution since late 2024, following the Open Compute Project's evolving rack power standards. Higher bus voltages reduce the I-squared-R resistive losses in power distribution cables within the rack, allowing more power to reach GPUs without requiring progressively thicker copper bus bars that add weight and cost. Compound Semiconductor reported that the reference design will be showcased at the Open Compute Project summit in San Jose from October 12 to 15, 2026, where it will reach the infrastructure architects at the companies building the hyperscale clusters that will train the next generation of frontier models. The OCP summit is effectively where data center power standards get ratified through adoption decisions by the five or six organizations that collectively buy the majority of the world's AI compute capacity.

Why This Matters More Than People Think

The shift to 800V DC bus distribution in AI data centers is accelerating faster than public reporting captures, and the power conversion bottleneck has been one of the quiet constraints on how quickly the transition can happen at full scale. The original barrier to 800V adoption was not the GPUs, the networking, or even the real estate; it was the power conversion hardware. Existing industrial power conversion designs based on silicon MOSFETs and silicon carbide devices cannot simultaneously achieve the efficiency, density, and switching frequency that 800V-to-6V single-stage conversion requires at AI rack power levels, which now reach 120 kilowatts per rack for Blackwell-based systems. GaN devices switch faster with lower conduction losses, enabling the single-stage topology that makes this conversion practical. Navitas and Microchip's reference design demonstrates for the first time that a commercially reproducible, hardware-agnostic GaN-based single-stage 800V converter can meet the performance and security requirements of hyperscale AI infrastructure at the component level.

The energy implications compound at the scale of the current AI infrastructure build-out. Global data center power consumption exceeded 600 terawatt-hours in 2025 and is projected to double by 2028 as AI inference load grows. If 20% of new AI racks globally adopted single-stage GaN power conversion by 2028, the aggregate power savings relative to two-stage silicon-based designs would exceed 18 to 22 gigawatts of peak draw, roughly equivalent to the combined nameplate capacity of 18 to 22 large nuclear power plants running at capacity. That number will not materialize from a single reference design release, but it illustrates why the power conversion efficiency problem is not a component-level concern. It is a grid-level concern. Analysis published in 2025 projected that AI data center load growth would strain grid capacity in ten major US metropolitan areas by 2027; efficient power conversion is among the few levers available to data center operators that can reduce that timeline pressure without restricting AI compute capacity itself.

The investment angle is worth noting for market participants tracking the AI infrastructure build-out. Navitas Semiconductor (NVTS) is a publicly traded company with a market capitalization well below its larger semiconductor peers; the GaN power market has historically concentrated in automotive and consumer electronics applications. AI data center GaN adoption represents a potential step-change in addressable market size. If hyperscalers adopt 800V GaN conversion at scale, the total volumes of GaN FETs required for AI infrastructure alone could approach the current annual production from all GaN power device manufacturers combined, creating a supply constraint that benefits early-mover GaN producers. The more durable market opportunity may be in GaN design wins with Tier 1 power supply manufacturers like Delta Electronics, Bel Fuse, and Vertiv, which are the actual volume suppliers to hyperscalers. Those design wins, announced in the form of reference design adoptions at events like OCP, are the leading indicators that investors tracking the GaN-in-AI-datacenter thesis should prioritize.

The Competitive Landscape

The AI data center power conversion market was long dominated by silicon MOSFET and silicon carbide designs from Infineon, STMicroelectronics, and onsemi. All three have GaN product lines but treat them as complements to their larger silicon businesses rather than as replacements. Navitas has taken the opposite approach, building its entire product strategy around GaN, which gives it both a deeper application focus and a narrower product portfolio. The entry of Microchip into a reference design partnership is strategically important because Microchip's dsPIC33AK controllers are widely used across industrial power applications, giving board designers a familiar digital control layer on top of the unfamiliar GaN power stage. That combination reduces the adoption barrier: engineers who already write firmware for dsPIC controllers can bring up a GaN power stage without learning a new digital design toolchain from scratch, which matters at a time when qualified power electronics engineers are in short supply globally.

The historical parallel worth studying is the transition from silicon to silicon carbide in electric vehicle inverters. In 2018, most EV drive inverters used silicon IGBTs. By 2024, SiC had captured approximately 70% of new EV platform designs, driven primarily by Tesla's decision to design its Model 3 inverter around SiC MOSFETs from ST Microelectronics. The technology transition took roughly six years from the first production-ready SiC inverter designs to dominant market share. In AI data center power conversion, NVIDIA's architecture decisions, specifically whether successor GPUs beyond Blackwell specify 800V input at the board level, will play the same role that Tesla played for SiC adoption. If NVIDIA's next architecture explicitly supports 800V direct input, GaN single-stage conversion will become the design path of least resistance for every board designer and OEM building AI server infrastructure globally.

The bear case for GaN in data centers is direct: silicon carbide achieves competitive efficiency at lower switching frequencies and benefits from a larger installed base of manufacturing capacity built over years of EV adoption. Navitas's GaN advantage concentrates in switching speed and conduction loss at high frequency; if target applications shift toward lower-frequency topologies for reliability or thermal reasons, SiC recaptures the advantage. Critics also point out that hyperscalers routinely develop proprietary power designs that bypass third-party reference designs entirely. Google's custom TPU power delivery systems, Meta's Open Rack v3 specifications, and Microsoft's Project Olympus power architectures all diverge from industry-standard reference designs when volume justifies bespoke engineering. The risk for Navitas and Microchip is that their reference design becomes a proof of concept that the largest buyers use to validate the technology and then develop internally, concentrating the commercial opportunity in Tier 2 and Tier 3 data center operators rather than the hyperscale segment.

Hidden Insight: The Power Constraint Is the Real AI Bottleneck

The conversations about AI infrastructure tend to focus on GPU supply, model capability, and data quality. The actual near-term constraint on how much AI gets deployed is electrical power, and not in the future-tense way that most reporting frames it. As of Q3 2026, colocation providers in Northern Virginia, Silicon Valley, and Northern Dublin have waiting lists for new AI workloads extending 18 to 24 months, not because rack space is unavailable but because utility interconnection agreements have reached their permitted draw limits. The AI data center build-out has consumed grid capacity faster than grid expansion can respond. New nuclear and gas peaker agreements take 3 to 5 years from contract to first power. In that environment, every percentage point of power conversion efficiency recovered through better hardware translates directly into more AI capacity that can be built within the existing grid interconnection envelope, without waiting for a new transformer or transmission line.

The 7-megawatt-per-100-megawatt-facility improvement from single-stage GaN conversion is real but understates the system-level impact. Power usage effectiveness, the ratio of total data center power draw to IT load power, for modern AI data centers runs between 1.15 and 1.35. When conversion efficiency improves by 6 percentage points, the cooling load decreases because less heat is generated in the power conversion stage. When the cooling load decreases, the mechanical cooling systems consume less power. When the mechanical systems consume less power, the PUE approaches 1.0. The compound effect of a 6-percentage-point conversion efficiency improvement can produce a 10 to 12 percentage point PUE improvement when the full cooling cascade is included. On a 100-megawatt facility operating at a PUE of 1.25, moving to 1.13 saves approximately 12 megawatts of total facility draw. That is a capital investment that pays back through reduced utility costs within two to three years at current electricity prices.

There is a regulatory angle that has largely escaped coverage in the AI infrastructure conversation. The European Energy Efficiency Directive mandates that data centers in EU member states operate below specific PUE thresholds, with penalties for non-compliance escalating through 2027. The directive's requirements are set at 1.3 for new facilities and 1.5 for existing facilities, with a stated ambition of 1.2 by 2030. Companies building AI infrastructure in Ireland, Germany, the Netherlands, and Sweden are under direct regulatory pressure to improve power efficiency metrics, and the conversion efficiency improvements from GaN-based designs map directly onto PUE compliance. A facility currently operating at 1.28 PUE because of conversion losses may reach 1.20 PUE through a power delivery hardware upgrade alone, without any changes to cooling infrastructure. The engineers at the OCP summit next week who represent EU-based operators will be evaluating exactly this question against the backdrop of regulatory penalties that take effect within 14 months.

The second-order effect that almost nobody tracks is the relationship between power conversion efficiency and the total capital cost of a data center construction project. Modern AI data center construction runs between $12 million and $18 million per megawatt of IT load, including power infrastructure, cooling, building shell, and network. A 6-percentage-point improvement in power conversion efficiency translates to fewer megawatts of electrical service required from the utility, reducing the size and cost of the electrical switchgear, transformers, UPS systems, and generator backup that the facility must build. On a 100-megawatt project, the reduction in electrical infrastructure capital cost from a 6-point efficiency gain can run $8 million to $12 million in avoided expenditure. That cost reduction does not appear in any benchmark or spec sheet; it appears in the facility development proforma. The engineers at OCP who understand this arithmetic are the ones most likely to accelerate GaN adoption beyond the initial hyperscaler reference design validation into production build specifications.

What to Watch Next

The Open Compute Project summit from October 12 to 15 in San Jose is the immediate event to monitor. Any hyperscaler that formally adopts the Navitas and Microchip reference design into its published open hardware specifications at OCP will effectively mandate GaN adoption across its entire Tier 1 supplier base. Meta's history with Open Rack standards demonstrates how quickly an OCP adoption decision propagates through the supply chain: from the day Meta published the Open Rack v3 specification, its server ODMs had approximately 18 months to qualify components before volume production ramp. If Google, Meta, or Microsoft endorses the 800V GaN design at this year's OCP summit, expect Tier 1 server OEMs to begin qualification programs within 30 days and target production volumes within 24 months from the adoption announcement.

Over the next 90 days, watch the order flow guidance that Navitas and Microchip provide in their quarterly earnings calls. GaN power device production requires different manufacturing processes than silicon, and current GaN wafer capacity is concentrated in a small number of foundries including Sumitomo Electric and MACOM. If hyperscalers are seriously qualifying 800V GaN designs, the demand signal will show up in wafer start data and in GaN device lead times at distribution. Navitas in particular has historically provided guidance on design win pipeline by end market; an unusual increase in the data center category in October and November earnings commentary would confirm that the OCP showcase translated into active customer engagements rather than reference design curiosity that stalls at the prototype stage.

At the 180-day mark, the most important leading indicator is the first publicly announced hyperscale deployment of an 800V GaN-based power system in a production AI cluster. When that announcement arrives, the hardware supply chain will begin scaling the component volumes needed for broad adoption, and the cost curves that currently make GaN more expensive per watt than silicon alternatives will start compressing toward parity. Once GaN reaches cost parity with silicon at these voltage and power levels, the efficiency and density advantages make the technology choice deterministic for new construction. The 180-day window is the appropriate horizon for supply chain positioning; the technology is real and the market is moving, but adoption timing remains the key uncertainty that separates this from a near-term catalyst versus a two-year infrastructure investment cycle.

The power constraint on AI is not a future problem; it is a present one, and the companies that solve it at the component level before the grid catches up will determine where the next generation of frontier models gets trained.

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