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Nvidia Bets on Rival Chip d-Matrix to Lock In Ecosystem

Nvidia plans to invest in inference chip rival d-Matrix while pulling it into NVLink Fusion to absorb competition and cement platform dominance.

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Key Takeaways

  • Nvidia reportedly plans to invest in d-Matrix, a $2 billion inference chip startup, per The Information citing three sources on October 9, 2026, with no formal confirmation yet.
  • d-Matrix joined Nvidia's NVLink Fusion platform in September, with Raptor XPU-based MGX rack systems targeting Q4 2027 that connect non-Nvidia inference chips to Nvidia's networking fabric.
  • Inference is projected to reach 60-70% of AI compute spending by 2028, making it the fastest-growing AI infrastructure segment where Nvidia's GPU dominance is most exposed to purpose-built alternatives.
  • The investment gives Nvidia governance rights and product roadmap visibility into d-Matrix, mirroring the Intel Capital strategy of investing to shape standards rather than purely for financial return.
  • The real competitive threat Nvidia is hedging is not AMD or d-Matrix but the captive silicon programs at Google (TPU), Amazon (Trainium), and Microsoft (Maia), which bypass Nvidia's networking layer entirely.

Nvidia is investing in a company that makes chips to compete with Nvidia. That's the headline, and it's accurate as far as it goes. But the real story is not a competitor absorbed or a talent bet placed. It is an ecosystem strategy executing in real time: Nvidia pulling a rival chip designer inside its platform so tightly that winning with non-Nvidia infrastructure becomes the condition for being relevant at all. The d-Matrix investment, reported by The Information on October 9, is less about a chip company and more about who owns the interconnect layer of the next generation of AI data centers.

What Actually Happened

The Information reported on October 9, 2026, that Nvidia plans to invest in d-Matrix, a seven-year-old AI inference chip startup. Three people with direct knowledge of the deal confirmed the plan to Data Center Dynamics. Neither Nvidia nor d-Matrix has issued a formal confirmation as of October 10. The investment amount, structure, governance rights, and precise closing timeline have not been disclosed. Previous reporting by The Information in July 2026 noted that d-Matrix was seeking additional financing at a target valuation of at least $5 billion, up from the $2 billion valuation established in its November 2025 Series C round of $275 million. The proposed Nvidia investment would be the company's first publicly reported stake in an AI inference chip startup since its $20 billion licensing agreement with Groq in December 2025, a deal that also had ecosystem-integration dimensions.

d-Matrix builds the Raptor XPU, an inference accelerator designed for disaggregated AI deployments where the prefill and decode phases of large language model inference run on separate, specialized hardware rather than on a single GPU cluster. The startup's core claim is that purpose-built inference silicon delivers better performance-per-watt and cost-per-token than general-purpose GPU clusters when running the decode phase of inference at scale. Microsoft has been a backer since a 2023 funding round, giving d-Matrix a key enterprise distribution channel alongside its technology development. As reported by TBreak, d-Matrix positions its Raptor racks not as GPU replacements but as complementary inference nodes that work alongside Nvidia systems, handling the decode phase while Nvidia Vera Rubin or Blackwell systems handle prefill and training. This disaggregated architecture is the technical prerequisite for the partnership that makes the investment strategically coherent.

In September 2026, one month before the investment report, d-Matrix announced that its next-generation Raptor processors would join Nvidia's NVLink Fusion platform, connecting to Nvidia's sixth-generation NVLink fabric and fitting into MGX reference architecture racks. As detailed by The Register, initial Raptor-based MGX systems are projected for Q4 2027. The NVLink Fusion integration means that a data center operator buying a d-Matrix inference rack would be buying a system physically connected to Nvidia's networking fabric. The training nodes may be Nvidia GPUs. The inference nodes may be d-Matrix XPUs. The networking fabric connecting all of them is Nvidia NVLink. That structural position is precisely what the investment is designed to protect and deepen.

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Why This Matters More Than People Think

Inference is the fastest-growing segment of AI compute spending, and it is the segment where Nvidia's competitive position is most vulnerable. Training large foundation models is expensive, happens relatively infrequently, and is dominated by Nvidia GPUs because training workloads are large, dense matrix multiplications that Nvidia's Tensor Core architecture handles better than any alternative at scale. Inference, running trained models against real user queries at production throughput, happens continuously and at accelerating volumes. Analyst projections from multiple sources suggest inference will account for 60 to 70% of total AI compute spending by 2028, up from roughly 30% today. This is the market that d-Matrix, Groq, Cerebras, and custom hyperscaler silicon are all designed to address, and it is the market where Nvidia's general-purpose GPU architecture is most exposed to purpose-built alternatives.

The d-Matrix investment is part of a broader Nvidia strategy that also includes Intel's Gaudi through the NVLink Fusion program, and Marvell's custom ASIC platform. The common thread is Nvidia's effort to make its interconnect fabric the standard integration layer for all AI compute, regardless of which company's silicon handles specific workloads. When a data center operator buys a heterogeneous rack that includes Nvidia GPUs for training, d-Matrix XPUs for inference, and Marvell ASICs for a specific workload, the NVLink networking that binds those components together is Nvidia hardware. The training revenue may be shared or lost in some configurations. The networking revenue is not. Nvidia's networking business, driven by InfiniBand and NVLink, was growing faster than its GPU revenue in the most recent fiscal period precisely because this strategy was already working before the d-Matrix announcement.

This matters because it represents a fundamental shift in how Nvidia competes. The traditional framing is GPU company versus GPU company, with AMD's MI300X as the main challenger. The NVLink Fusion strategy is not a response to AMD. It is a response to the possibility that the inference market develops a diverse ecosystem of purpose-built chips that operate independently of Nvidia infrastructure. If inference workloads migrate to custom ASICs that connect through industry-standard Ethernet rather than NVLink, Nvidia's networking moat disappears. By pulling d-Matrix, Intel, and Marvell into NVLink Fusion, Nvidia is ensuring that the inference ecosystem it cannot win on silicon grounds can still generate networking revenue and platform-lock effects that benefit Nvidia. The question is not whether this strategy is clever. It obviously is. The question is whether it is sufficient to prevent the long-term scenario Nvidia is most worried about.

The Competitive Landscape

The competitive picture in AI inference silicon is genuinely fragmented in ways that are unusual for semiconductor markets. AMD's MI300X has made real inroads at hyperscaler accounts, particularly at Microsoft Azure and Meta. Intel's Gaudi 3 is positioned in the price-performance tier below Nvidia's flagship and has found customers in European and Asian cloud providers who have compliance or geopolitical reasons to diversify away from Nvidia. Cerebras has deployed its wafer-scale engine at national labs, financial institutions, and research universities. Groq's Language Processing Units have achieved sub-millisecond latency for specific use cases with compelling economics. The bear case for Nvidia's inference dominance is that inference is more workload-specific than training: the optimal hardware depends on model architecture, sequence length, batch size, and latency requirements in ways that favor purpose-built silicon over general-purpose GPUs for defined use cases.

Nvidia has responded to this fragmentation not by attempting to build the best chip for every inference use case, but by making its ecosystem the integration layer that every inference chip must interface with to reach enterprise customers at scale. The historical parallel with ARM is instructive and frequently cited but consistently misunderstood. ARM's transition from chip designer to architecture licensor was forced by competitive losses in the PC processor market. Nvidia's NVLink Fusion strategy is proactive, executed from a position of dominant market share, before the competitive threat has fully materialized. The better parallel is Intel Capital in its prime: Intel invested in the ecosystem, not to generate financial returns primarily, but to shape which technologies became standard and which remained niche. By the time a technology Intel had not invested in became popular, Intel had either the governance rights to influence it or the timing to build a competing solution with privileged information.

The risk, however, is that validation from Nvidia accelerates d-Matrix's trajectory faster than Nvidia can manage. By investing in d-Matrix and pulling it into NVLink Fusion, Nvidia provides a startup with credibility, a distribution channel, and access to capital that it might not have secured independently at its target valuation. If d-Matrix's Raptor XPU performs well enough in production enterprise deployments to establish a reputation for cost-per-token efficiency, hyperscalers may adopt it specifically because it reduces their per-query cost, which reduces their Nvidia GPU bills. Nvidia would collect NVLink networking revenue on those workloads, but at a lower margin than if the same workload ran on Nvidia GPUs. Critics argue this is a manageable tradeoff. Skeptics point out that "manageable" is what every platform company says about ecosystem competition until the ecosystem competitor gets large enough to negotiate from a position of leverage.

Hidden Insight: The Toll Road Strategy

The d-Matrix investment makes full strategic sense only when viewed through the lens of what Nvidia is actually trying to own. The company is not trying to build the best chip for every workload. It is trying to own the infrastructure layer through which all AI workloads flow, regardless of whose silicon handles the computation. NVLink Fusion is that infrastructure layer: a high-bandwidth, low-latency interconnect fabric that ties together GPU nodes, inference accelerators, memory systems, and storage into a coherent rack-scale architecture. Once a data center operator builds infrastructure around NVLink, replacing any component requires replacing the entire interconnect architecture. The switching cost is not the cost of buying different chips: it is the cost of redesigning the entire data center rack architecture. That switching cost is Nvidia's real moat, not the GPU itself.

The information rights that come with the d-Matrix investment are as strategically valuable as the financial stake. As an investor, Nvidia gains visibility into d-Matrix's customer pipeline, pricing strategy, and product roadmap before that information becomes public. That visibility tells Nvidia exactly where its own GPUs are losing inference workloads on price-performance, with which customers, and at what price points. Armed with that data, Nvidia can time its own inference-optimized product releases, pricing changes, and software optimizations to address competitive threats before they become structural losses. The governance stake also gives Nvidia a seat in product roadmap discussions, enabling the company to influence d-Matrix's architectural decisions in ways that preserve NVLink compatibility and prevent d-Matrix from building features that make Nvidia's networking layer unnecessary.

The hyperscaler threat is the underlying dynamic that explains the urgency of this entire strategy. Google's TPUs, Amazon's Trainium and Inferentia, and Microsoft's Maia chips are internal, captive silicon programs designed to reduce cloud provider dependence on Nvidia GPUs. These chips are not available for purchase: they are operational cost-reduction tools that allow hyperscalers to serve AI workloads at lower cost without paying Nvidia's margins. The chips do not use NVLink: they use hyperscaler-proprietary interconnects. If the captive silicon programs succeed well enough to handle 50% or more of hyperscaler inference workloads, Nvidia loses both the GPU revenue and the networking revenue on those workloads. NVLink Fusion is Nvidia's strategy for the non-captive market: everything that does not run on custom hyperscaler silicon needs to connect through something, and Nvidia wants that something to be NVLink.

The timeline creates a specific window of strategic vulnerability for Nvidia's plan. d-Matrix's Raptor-based MGX systems are projected for Q4 2027, more than a year away. Between now and then, d-Matrix needs to close its $5 billion target funding round, complete the full NVLink Fusion technical integration, and build a go-to-market pipeline at enterprise accounts that can justify the valuation. If the AI funding environment tightens in 2027, d-Matrix's fundraising could stall, making Nvidia's investment the primary capital source and greatly increasing Nvidia's leverage over the product roadmap. That scenario, the inference startup that becomes functionally a Nvidia subsidiary rather than an independent competitor, may be the intended endgame: a company too deeply integrated into NVLink and too dependent on Nvidia capital to pursue an architecture that could make NVLink optional.

What to Watch Next

Watch for the formal announcement of Nvidia's investment terms in the next 30 days. The Information's report cited three sources but has not been confirmed by either company. An official announcement would reveal the investment size, governance rights, and any exclusivity provisions on NVLink Fusion. If the formal agreement includes any restrictions on d-Matrix's ability to build NVLink-alternative interconnect compatibility, that detail would confirm that Nvidia's primary goal is platform lock-in rather than financial return. The presence or absence of exclusivity terms is the single most important data point in the formal announcement, and it will be buried in the fine print of any press release if it exists at all.

Watch the NVLink Fusion ecosystem roster expand over the next 90 days. In September 2026, d-Matrix announced its NVLink Fusion partnership. Intel and Marvell have also joined. Watch for additional announcements from memory suppliers, storage companies, and networking equipment vendors. If Samsung or SK Hynix announces NVLink-compatible HBM memory integration, or if a major InfiniBand competitor announces NVLink Fusion support, it would signal that Nvidia is successfully making NVLink the default integration standard for next-generation AI data centers. Each additional member of the NVLink Fusion ecosystem makes the standard more difficult for any single operator to avoid without incurring steep integration costs.

Watch d-Matrix's financing close timeline and capitalization table. The company was seeking additional financing at a $5 billion valuation as of July 2026. If that round closes in Q4 2026 with Nvidia as a named investor, the remaining investors on the cap table tell a critical story. Microsoft is already a backer. A new investment from AWS or Google would signal that the hyperscalers view d-Matrix's disaggregated inference architecture as a path to third-party silicon they can adopt without building captive ASICs for every workload. That scenario would validate d-Matrix's product thesis and simultaneously confirm that the NVLink Fusion strategy is working as Nvidia designed it: pulling hyperscaler inference workloads into Nvidia's networking fabric even when the compute silicon is not Nvidia's.

Nvidia isn't buying a competitor. It's building a toll road through the one market it doesn't yet own.


Key Takeaways

  • Nvidia reportedly plans to invest in d-Matrix, a $2 billion inference chip startup, per The Information citing three sources on October 9, 2026, with no formal confirmation yet from either company.
  • d-Matrix joined Nvidia's NVLink Fusion platform in September, with Raptor XPU-based MGX rack systems targeting Q4 2027, connecting non-Nvidia inference chips to Nvidia's networking fabric.
  • Inference is projected to reach 60-70% of AI compute spending by 2028, making it the fastest-growing segment of AI infrastructure and the market where Nvidia's GPU dominance is most exposed to purpose-built alternatives.
  • The investment gives Nvidia governance rights and product roadmap visibility into d-Matrix, mirroring the Intel Capital strategy of investing in the ecosystem to shape standards rather than purely for financial return.
  • The real competitive threat Nvidia is hedging is not AMD or d-Matrix but the captive silicon programs at Google (TPU), Amazon (Trainium), and Microsoft (Maia), which bypass Nvidia's networking layer entirely on hyperscaler workloads.

Questions Worth Asking

  1. If NVLink Fusion becomes the standard interconnect for third-party AI inference chips, does Nvidia win the AI infrastructure market even if it loses large portions of inference compute revenue to purpose-built silicon?
  2. What happens to AMD's ROCm open-source ecosystem strategy if most third-party inference chip companies integrate with NVLink rather than building software compatibility with AMD's stack?
  3. The hyperscalers are building captive silicon specifically to avoid paying Nvidia's margins. Does NVLink Fusion actually solve that problem, or does it only address the non-hyperscaler segment of the market?

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